
Re: Fatman assembly problem.
Look to be sure the wire that joins the Attack, Decay, and Release controls has good joints. It is easy to miss flowing solder to a wire when there are multiple ones on a terminal.
Compare the codes stamped on the back of the 1M potentiometers (the 1M value marking is on the side facing the panel).
If the controller sends a fixed velocity value then advancing the Velcocity cv amount to the VCA would be like instant on/off according to key down/up. Usually, a mix of VCA ADSR envelope and Velocity CV is best -- just velocity would be more abrupt.
If things look OK with the panel controls and the wires to them and their solder joints, check in the area of transistors Q10 and Q11 on the board. Maybe a joint blobbed and is causing a bridge, or, a circuit-trace and solder pad area cracked. If you don't see a break, look at the joints while gently nudging the transistor from the top side of the board watching for any movement of the solder pad. Scape away some of the coating to expose copper and solder a wire over any break.
Here are some checks and tests copied over from a previous VCA ADSR help response:
Following are some tests and checks for the VCA ADSR sections. It might help to have the illustration supplement page from the manual for the parts placement figure 1a to help with locating parts and schematics figures 5a and 5b for following through the descriptions below. Identify and examine these points and circuits on the board too--the trouble might be found just by looking at the right spot. The diagrams showing the control wiring will be useful too.
As for no R102-3 voltage (VCA ADSR Envelope CV or control voltage amount control), following are some voltages you should see. Note the first two on the uC output port line o13 and wiring point V are timed and with attack at minimum the changes will be very short duration (about 100 micro Seconds (uS)) and at maximum about 3.4 Seconds (S).
Output port line o13 (originating at the IC1 uC pin 3) runs out to resistor R88 and can be measured on the "8" end of this resistor. The jumper wire near wiring point S "points" to this resistor and the 8 end is the one towards the uC. The Key-up (Gate LED off) voltage for this line is about 1.8v. The key-down voltage drops to 0v for the duration of the VCA ADSR Attack phase (100uS to 3.4S as previously noted).
This voltage transition operates transistor Q10: When there is voltage to the transistor it is "on" and the voltage on its collector pin or Wiring point V is shunted to ground. When there is no voltage to the transistor it is off and the collector voltage (wiring point V) is there (from R90 and the connection of it to the V+ 8vdc circuit). Voltage on point V goes through D7 and via wire X to the Attack control R94 and the setting of this control varies the resistance and the time it takes the voltage to charge capacitor C19. Op-amp stage IC12:D copies this weak energy that is the charge on 19 to a stronger voltage that is the ADSR Envelope CV. So, as C19 charges, the output of IC12 follows suit.
Here's where things can go wrong as the ADSR Attack is dependent upon transistor Q10 switching and transistor Q10 switching is dependent upon the Attack phase (setting the duration of the o13 pulse). IC8:D is a comparator stage and it's job is to indicate which of its inputs is most positive. When pin11 is most positive (normally 7v Vref voltage as set by resistors R85 and R86 and shown schematically up by the VCF AR circuit), the output is 5v--when pin 10 is most positive, the output is 0v. This voltage level is a signal back to the uC as to the state of the ADSR. When it drops from 5v to 0v, the uC input port line i1 changes state from 0v to 5v with the IC7:E inverter stage on IC8's output pin 13. This i1 port line signal to the uC pin 12 starts the ADSR Decay phase and the o13 port line goes back 'high' or to 1.8v, turning 'on' transistor Q10.
Q10 zeros the voltage at point V and the setting of the Sustain control adjusts the amount of voltage the Decay control and wire W 'sees' via D6. When the control is anywhere less than maximum the charge on C19 has a path for discharge and the ADSR Envelope CV decays to this Sustain level (or just stays at a maximum 7v) for the duration of the key-press.
When all keys are up and the Gate LED is off, uC output port line o14 goes 'high' or to 3.7v from the 0v key-down level. This turns 'on' transistor Q11 which then provides a discharge path for any 'sustain' level charge remaining on C19 via the release control and wire Y through R95 and D8. The setting of the Release control R96 affects the resistance C19 'sees' as it discharges towards zero through the 'on' or conducting Q11.
The R102 VCA ADSR control provides an adjustable amount of the VCA ADSR Envelope CV that gets to the following circuit section build around op-amp IC13:C. This section converts the voltage change to a current change. Voltage measurements don't tell so much here. But if pin 1 of IC18, the current control pin has a voltage other than nearly -12v, then something is awry. Check the soldering and circuit-traces joining IC13 pins 10, 9, and 8, Q12, C24, D9, R106, R99, R103. Pin 10 should be 0v or ground/circuit-common pin 11 is V- or negative 12v and pin 4 is V+ or positive 8v.
-0-0-0-0-0-0-0-
R38 burning points to maybe a miswire with the sub-octave mod you've added. Go back and review the details to confirm you have the additions in order and that soldering for them hasn't created any bridges. The resistor might still be OK, and things would work again once the trouble is resolved, but while in there you might as well replace it.
It is normal that VCO1 Offset (and Glide) affects overall pitch slightly. Just go back and tweak pitch afterwards. The VCO anti-phase-lock modification over in this section of PAiA Talk helps minimize this with the substitution of op-amps at ICs 10 and 13.
viewtopic.php?f=15&t=238Here's to success!